Search results for " reconfigurable architecture."
showing 3 items of 3 documents
A new heterogeneous and reconfigurable architecture for image analysis
1993
In the paper a new architecture for image analysis: HERMIA (Heterogeneous and Reconfigurable Machine for Image Analysis) is presented. It has bt:en developed at the University of Palermo, inside the Progetto Finalizzato of the ltalian Council of Researches (CNR): Sistemi informatici e Calcolo Parallelo. The architecture of the HERMIA-machine is reconfigurable, moreover the integration of heterogeneous module, oriented to the solution of specific problems, allows to salve complex problems by search of optimal strategies. Signa! processing units allows the user to handle and integrate multi-sensors signals (from video, scanner, music recorder). Here the generai architecture, the hardware impl…
FPGA Implementation of a Reconfigurable 802.11 Medium Access Control
THis work describes a full implementation of a reconfigurable IEEE 802.11 Medium Access Control (MAC) in FPGA using a System on Chip (SoC) architecture. The proposed implementation has been designed with a great structural flexibility, so to ease the protocol modification, and to support Quality of Service (QoS) function. Estensive tests has been carried out showing a full compliance to the 802.11 standard timing and algorithms.
A Software Defined Radio Platform Implementing a WiFi and ZigBee Receiver
2006
A successful attempt to design and implement a multi-standard compliant Basebnd Processor is here presented. By exploiting the potential of FPGA's reconfigurability, the received signal from RF stage have been processed in order to properly decode frames of IEEE 802.11 (WiFi) and IEEE 802.15.4 (ZigBee) protocols. both falling within the ISM band (centered at 2.45GHz). The experimental implementation carried out is a practical demonstration of the Software Defined Radio concept.